The complexity and scale of Networks-on-Chip (NoCs) are growing as more processing elements and memory devices are implemented on chips. However, under strict power budgets, it is also critical to lower the power consumption of NoCs for the sake of energy efficiency. In this paper, we therefore present three novel input unit designs for on-chip routers attempting to shrink their power consumption while still conserving the network performance. The key idea behind our designs is to organize buffers in the input units with characteristics of the network traffic in mind; as in our observations, only a small portion of the network traffic are long packets (composed of multiple flits), which means, it is fair to implement hybrid, asymmetric and reconfigurable buffers so that they are mainly targeting at short packets (only having a single flit), hence the smaller power consumption and area overhead. Evaluations show that our hybrid, asymmetric and reconfigurable input unit designs can achieve an average reduction of energy consumption per flit by 45%, 52.3% and 56.2% under 93.6% (for hybrid designs) and 66.3% (for asymmetric and reconfigurable designs) of the original router area, respectively. Meanwhile, we only observe minor degradation in network latency (ranging from 18.4% to 1.5%, on average) with our proposals.

This letter introduces a prime-factor Galois field Fourier transform (PF-GFFT) architecture to frequency domain decoding (FDD) of cyclic codes. Firstly, a fast FDD scheme is designed which converts the original single longer Fourier transform to a multi-dimensional smaller transform. Furthermore, a ladder-shift architecture for PF-GFFT is explored to solve the rearrangement problem of input and output data. In this regard, PF-GFFT is considered as a lower order spectral calculation scheme, which has sufficient preponderance in reducing the computational complexity. Simulation results show that PF-GFFT compares favorably with the current general GFFT, simplified-GFFT (S-GFFT), and circular shifts-GFFT (CS-GFFT) algorithms in time-consuming cost, and is nearly an order of magnitude or smaller than them. The superiority is a benefit to improving the decoding speed and has potential application value in decoding cyclic codes with longer code lengths.

In object tracking, a recent trend is using “Tracking by Detection” technique which trains a discriminative online classifier to detect objects from background. However, the incorrect updating of the online classifier and insufficient features used during the online learning often lead to the drift problems. In this work we propose an online random fern classifier with a simple but effective compressive feature in a framework integrating the online classifier, the optical-flow tracker and an update model. The compressive feature is a random projection from highly dimensional multi-scale image feature space to a low-dimensional representation by a sparse measurement matrix, which is expect to contain more information. An update model is proposed to detect tracker failure, correct tracker result and constrain the updating of online classifier, thus reducing the chance of wrong updating in online training. Our method runs at real-time and the experimental results show performance improvement compared to other state-of-the-art approaches on several challenging video clips.

The unconditional stable finite-difference time-domain (US-FDTD) method based on Laguerre polynomial expansion and Galerkin temporal testing is used to model thin-film bulk acoustic wave resonators (TFBAR). Numerical results show the efficiency of the US-FDTD algorithm.

Time synchronization is an essential service for wireless sensor networks (WSNs). However, fixed-period time synchronization can not serve multiple users efficiently in terms of energy consumption. This paper proposes a lightweight precision-adaptive protocol for cluster-based multi-user networks. It consists of a basic average time synchronization algorithm and an adaptive control loop. The basic average time synchronization algorithm achieves 1 µs instantaneous synchronization error performance. It also prolongs re-synchronization period by taking the average of two specified nodes' local time to be cluster global time. The adaptive control loop realizes diverse levels of synchronization precision based on the proportional relationship between sync error and re-synchronization period. Experimental results show that the proposed precision-adaptive protocol can respond to the sync error bound change within 2 steps. It is faster than the exponential convergence of the adaptive protocols based on multiplicative iterations.

A fully integrated clock and data recovery circuit with the proposed gated frequency detector (GFD) is presented. It has been realized in a standard 0.25-µm CMOS technology. The proposed voltage-controlled oscillator (VCO) can achieve wide operation range and reasonable conversion gain by employing the analog/digital dual loop architecture. The characteristics of small VCO gain can help to reduce loop bandwidth without enlarge the capacitors and relax the constraint on choosing the loop parameter to reduce the size of the on-chip capacitor. The proposed GFD will make the frequency lock time fixed and can avoid the harmonic locking problem in digital domain for wide data rate operations. All measured BERs are less than 10-12 with the data rate from 1.7 Gbps to 3.125 Gbps.

Single-instruction multiple-data (SIMD) extension provides an energy-efficient platform to scale the performance of media and scientific applications while still retaining post-programmability. However, the major challenge is to translate the parallel resources of the SIMD hardware into real application performance. Currently, all the slots in the vector register are used when compilers exploit SIMD parallelism of programs, which can be called sufficient vectorization. Sufficient vectorization means all the data in the vector register is valid. Because all the slots which vector register provides must be used, the chances of vectorizing programs with low SIMD parallelism are abandoned by sufficient vectorization method. In addition, the speedup obtained by full use of vector register sometimes is not as great as that obtained by partial use. Specifically, the length of vector register provided by SIMD extension becomes longer, sufficient vectorization method cannot exploit the SIMD parallelism of programs completely. Therefore, insufficient vectorization method is proposed, which refer to partial use of vector register. First, the adaptation scene of insufficient vectorization is analyzed. Second, the methods of computing inter-iteration and intra-iteration SIMD parallelism for loops are put forward. Furthermore, according to the relationship between the parallelism and vector factor a method is established to make the choice of vectorization method, in order to vectorize programs as well as possible. Finally, code generation strategy for insufficient vectorization is presented. Benchmark test results show that insufficient vectorization method vectorized more programs than sufficient vectorization method by 107.5% and the performance achieved by insufficient vectorization method is 12.1% higher than that achieved by sufficient vectorization method.

An all-digital clock deskew buffer with variable duty cycles is presented. The proposed circuit aligns the input and output clocks with two cycles. A pulsewidth detector using the sequential time-to-digital conversion is employed to detect the duty cycle. The output clock with adjustable duty cycles can be generated. The proposed circuit has been fabricated in a 0.35 µm CMOS technology. The measured duty cycle of the output clock can be adjusted from 30% to 70% in steps of 10%. The operation frequency range is from 400 MHz to 600 MHz.

Supporting quality-of-service (QoS) of multimedia communications over IEEE 802.11 based ad hoc networks is a challenging task. This paper develops a simple 3-D Markov chain model for queuing analysis of IEEE 802.11 MAC layer. The model is applied for performance analysis of voice communications over IEEE 802.11 single-hop ad hoc networks. By using the model, we finish the performance optimization of IEEE MAC layer and obtain the maximum number of voice calls in IEEE 802.11 ad hoc networks as well as the statistical performance bounds. Furthermore, we design a fully distributed call admission control (CAC) algorithm which can provide strict statistical QoS guarantee for voice communications over IEEE 802.11 ad hoc networks. Extensive simulations indicate the accuracy of the analytical model and the CAC scheme.

In this paper, we propose a decentralized strategy to find out the linear precoding matrices for a two-hop multiuser relay communication system. From a game-theoretic perspective, we model the source allocation process as a strategic noncooperative game for fixing relay precoding matrix and the multiuser interference treating as additive colored noise. Alternately, from the global optimization perspective, we prove that the optimum relay precoding matrix follows the transceiver Winner filter structure for giving a set of source transmit matrices. Closed-form solutions are finally obtained by using our proposed joint iterative SMSE algorithm and numerical results are provided to give insights on the proposed algorithms.

This letter proposes an efficient compression scheme for the copyright- and privacy-protected image trading system. The proposed scheme multiplies pseudo random signs to amplitude components of discrete cosine transformed coefficients before the inverse transformation is applied. The proposed scheme efficiently compresses amplitude-only image which is the inversely transformed amplitude components, and the scheme simultaneously improves the compression efficiency of phase-only image which is the inversely transformed phase components, in comparison with the conventional systems.

In this paper, a simple pattern reconfigurable antenna with broadband circular polarization is proposed. The proposed antenna consists of four rectangular loops, a feeding network and four reflectors. Circular polarization is achieved by cutting two slots on opposite sides of the loops. By controlling the states of the four PIN diodes present in the feeding network, the proposed antenna can achieve four different pattern modes at the same frequency. Experiments show that the antenna has a bandwidth of 47.6% covering 1.73-2.81GHz for reflection coefficient (|S11|)<-10dB and a bandwidth of 55% covering 1.62-2.85GHz for axial ratio <3dB. The average gain is 8.5dBi and the radiation patterns are stable.

In this paper, we propose a novel method for road sign detection and recognition in complex scene real world images. Our algorithm consists of four basic steps. First, we employ a regional contrast based bottom-up visual saliency method to highlight the traffic sign regions, which usually have dominant color contrast against the background. Second, each type of traffic sign has special color distribution, which can be explored by top-down visual saliency to enhance the detection precision and to classify traffic signs into different categories. A bag-of-words (BoW) model and a color name descriptor are employed to compute the special-class distribution. Third, the candidate road sign blobs are extracted from the final saliency map, which are generated by combining the bottom-up and the top-down saliency maps. Last, the color and shape cues are fused in the BoW model to express blobs, and a support vector machine is employed to recognize road signs. Experiments on real world images show a high success rate and a low false hit rate and demonstrate that the proposed framework is applicable to prohibition, warning and obligation signs. Additionally, our method can be applied to achromatic signs without extra processing.

Localized content-based image retrieval (LCBIR) has emerged as a hot topic more recently because in the scenario of CBIR, the user is interested in a portion of the image and the rest of the image is irrelevant. In this paper, we propose a novel region-level relevance feedback method to solve the LCBIR problem. Firstly, the visual attention model is employed to measure the regional saliency of each image in the feedback image set provided by the user. Secondly, the regions in the image set are constructed to form an affinity matrix and a novel propagation energy function is defined which takes both low-level visual features and regional significance into consideration. After the iteration, regions in the positive images with high confident scores are selected as the candidate query set to conduct the next-round retrieval task until the retrieval results are satisfactory. Experimental results conducted on the SIVAL dataset demonstrate the effectiveness of the proposed approach.

A CMOS voltage-to-current converter in weak inversion is presented in this Letter. It can operate for low supply voltage and its power consumption is also low. As the input voltage varies from -0.15 V to 0.15 V, the measured maximum linearity error for the proposed voltage-to-current converter, is about 3.35%. Its power consumption is only 26 µW under the supply voltage of 2 V. The proposed voltage-to-current converter has been fabricated in a 0.5 µm N-well CMOS 2P2M process. The proposed circuit is expected to be useful in analog signal processing applications.

Face verification in the presence of age progression is an important problem that has not been widely addressed. Despite appearance changes for same person due to aging, they are more similar compared to facial images from different individuals. Hence, we design common and adapted vocabularies, where common vocabulary describes contents of general population and adapted vocabulary represents specific characteristics of one of image facial pairs. And the other image is characterized with a concatenation histogram of common and adapted visual words counts, termed as “age-invariant distinctive representation”. The representation describes whether the image content is best modeled by the common vocabulary or the corresponding adapted vocabulary, which is further used to accomplish the face verification. The proposed approach is tested on the FGnet dataset and a collection of real-world facial images from identification card. The experimental results demonstrate the effectiveness of the proposed method for verification of identity at a modest computational cost.

In this paper, the application of an unsupervised parallel approach called the Fuzzy Hopfield Neural Network (FHNN) for vector qunatization in image compression is proposed. The main purpose is to embed fuzzy reasoning strategy into neural networks so that on-line learning and parallel implementation for codebook design are feasible. The object is to cast a clustering problem as a minimization process where the criterion for the optimum vector qunatization is chosen as the minimization of the average distortion between training vectors. In order to generate feasible results, a fuzzy reasoning strategy is included in the Hopfield neural network to eliminate the need of finding weighting factors in the energy function that is formulated and based on a basic concept commonly used in pattern classification, called the "within-class scatter matrix" principle. The suggested fuzzy reasoning strategy has been proven to allow the network to learn more effectively than the conventional Hopfield neural network. The FHNN based on the within-class scatter matrix shows the promising results in comparison with the c-means and fuzzy c-means algorithms.

We propose a compact magnetic tunnel junction (MTJ) model for circuit simulation by de-facto standard SPICE in this paper. It is implemented by Verilog-A language which makes it easy to simulate MTJs with other standard devices. Based on the switching probability, we smoothly connect the adiabatic precessional model and the thermal activation model by using an interpolation technique based on the cubic spline method. We can predict the switching time after a current is applied. Meanwhile, we use appropriate physical models to describe other MTJ characteristics. Simulation results validate that the model is consistent with experimental data and effective for MTJ/CMOS hybrid circuit simulation.

The multi-step prediction model based on partial least squares (PLS) is established to predict short-term load series with high embedding dimension in this paper, which refrains from cumulative error with local single-step linear model, and can cope with the multi-collinearity in the reconstructed phase space. In the model, PLS is used to model the dynamic evolution between the phase points and the corresponding future points. With research on the PLS theory, the model algorithm is put forward. Finally, the actual load series are used to test this model, and the results show that the model plays well in chaotic time series prediction, even if the embedding dimension is selected a big value.

Model-based sensorless control of permanent magnet synchronous motor (PMSM) is promising for high-speed operation to estimate motor state, which is the speed and the position of the rotor, via electric signals of the stator, beside the inevitable fact that estimation accuracy is degraded by electromagnet interference (EMI) from switching devices of the converter. In this paper, the simulation system based on Luenberger observer and phase-locked loop (PLL) has been established, analyzing impacts of EMI on motor state estimations theoretically, exploring influences of EMI with different cutoff frequency, rated speeds, frequencies and amplitudes. The results show that Luenberger observer and PLL have strong immunity, which enable PMSM can still operate stably even under certain degrees of interference. EMI produces sideband harmonics that enlarge pulsation errors of speed and position estimations. Additionally, estimation errors are positively correlated with cutoff frequency of low-pass filter and the amplitude of EMI, and negatively correlated with rated speed of the motor and the frequency of EMI.  When the frequency is too high, its effects on motor state estimations are negligible. This work contributes to the comprehensive understanding of how EMI affects motor state estimations, which further enhances practical application of sensorless PMSM.